Viewing posts for the category VP1

22: The remaining memory loads & new vector register

I guess it's time to deal with 0xc8 and 0xc9 opcodes.

21: The data store

It's time to talk about the data store again.

20: hwtest and vector instructions, part 5

There are 12 unknown vector opcodes left: 0x84, 0x86, 0x87, 0x96, 0x97, 0xa6, 0xa7, and 0xb3-0xb7. Let's finish them off.

19: the scalar -> vector path

The only unknowns still left in scalar and vector units involve the scalar to vector bus. Time to deal with it. Starting with 0x85 and 0x95, together with 0x0f scalar opcode.

18: hwtest improvements

hwtest is a great tool, but its current implementation for VP1 has a problem I mentioned last time: instead of randomizing $c, $vc, and $va state on each run, the state from previous run is kept, since we have no easy way of writing it. While it's not a problem for $c and $vc, since these are relatively evenly distributed when generated by random instructions, it hides a real bug for $va: while we've determined the accumulator size to be 28 bits, the code treats it as if it had 32 bits, and it passes since the overflow behavior almost never comes up. In fact, to cause overflow, hwtest would have to come up with mul-add instructions a dozen times or so, have them all pull in one direction (up or down), and have no intervening mul instructions (which would reset the accumulator). Time to change that and make write functions for these registers.